Semiconductor integrated circuit package having electrically disconnected solder balls for mounting

ABSTRACT

Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with respect to the PCB until the circuit is wire bonded and an underfill material is cured between the die and the PCB to more permanently connect them together. The underfill material is selected to have a coefficient of thermal expansion (CTE) that is substantially equal to the CTE of the solder balls to prevent thermal mismatch problems. An overmolding compound is disposed about the die and the underfill material and about the wire bonds to complete the package. Various arrangements of the solder ball pads on the die include columnar and row, corner, diagonal, cross, and periphery arrangements.

FIELD OF THE INVENTION

[0001] The present invention relates to semiconductor integrated circuit(IC) packaging. In particular it relates to a board-on-chip (BOC)configuration using electrically disconnected solder balls for mountinga die to a substrate.

BACKGROUND OF THE INVENTION

[0002] The art of packaging ICs has continued to evolve and todayrepresents a tremendous engineering challenge as ICs become smaller andmore transistor dense. The packages encase many varieties of ICs, suchas microprocessors, application specific ICs, cache and system memory,and range from packaging a single ICs to multiple ICs. No matter whichtype of package is used, the considerations for packaging are allgenerally the same. For example, packages are desired that arerelatively inexpensive, are mechanically stable, are properly sized andcan reliably distribute electric signals between various circuits andcomponents while removing unwanted heat and offering protection inhostile environments. As expected, a trade-off exists betweensimultaneously being able to optimize each of the above considerations.

[0003] In conventional BOC package configurations, an IC in the form ofa die is secured to a printed circuit board (PCB) by means of atwo-sided tape that is sandwiched between the die and PCB. After curing,the die is electrically connected to the PCB via wire bonding andover-molded with an epoxy molding compound to form a complete package.The over-molding is typically performed in a molding cavity under hightemperature and pressure conditions, such as 180° C. and 1000 psi, wherethe epoxy molding compound is forced to fill crevices in and around thewire bonds, the die and the PCB. During cooling, however, tremendousthermal mismatch occurs between all the foregoing mentioned structureswhich mechanically stresses the package. As a result, silica filler inthe epoxy molding compound (typically 80-90% by weight) often impingesupon the die and the PCB and frequently mechanically and/or electricallycompromises the package.

[0004] Thereafter, manufacturers typically perform package testing. Someof the tests are performed according to convention, such as the JEDECstandard tests, where assessment of a package's moisture sensitivity,thermal shock and temperature cycle, to name a few, is undertaken. Thetape, however, is notoriously known for becoming de-laminated from oneor both of the die and the PCB during such tests. Not only doesde-lamination result in an inferior package, it also severely limits amanufacturer's ability to market its product since many IC packages aremarked according to what level of JEDEC test was passed. For example,with level 1 being the best and level 4 being the worst, an IC packagemarked as a level 3 means it passed the level 3 test but failed thelevel 2 test. Some manufacturers even consider the tape to be the mostlimiting factor in all JEDEC testing.

[0005] Accordingly, the packaging arts desire an efficaciously formedpackage having improved thermal properties that are capable of achievinga higher pass rate during testing.

SUMMARY OF THE INVENTION

[0006] The above-mentioned and other problems become solved by applyingthe apparatus, method and system principles and teachings associatedwith the hereinafter described semiconductor IC package havingelectrically disconnected solder balls useful during mounting a die to asubstrate.

[0007] In one embodiment, an integrated circuit package is taught thatconnects a plurality of solder balls between a plurality of solder ballpads of a die and substrate pads of a substrate, such as a printedcircuit board. The solder balls are electrically disconnected from anycircuit of the die, i.e., “dummy” solder balls, and are used totemporarily hold the die in position with respect to the printed circuitboard until the circuit is wire bonded and an underfill material iscured between the die and the printed circuit board to more permanentlyconnect them together. The underfill material is selected to have acoefficient of thermal expansion (CTE) that is substantially equal tothe CTE of the solder balls. In this manner, the thermal mismatch of theprior art is avoided. The de-lamination problems associated withtwo-sided tapes are also avoided since the underfill material is bettersuited in joining a die and printed circuit board. The package iscompleted by disposing an overmolding compound about the die and theunderfill material and about the wire bonds to protect the package frommoisture, thermal swings, etc., in hostile environments. Variousarrangements of the solder ball pads on the die are disclosed andinclude columnar and row, corner, diagonal, cross, and peripheryarrangements.

[0008] In other embodiments, a plurality of dies are connected to theprinted circuit board in the same manner as described above. Memorysystems and electronic systems are also described that include memorycircuits packaged according to the above.

[0009] These and other embodiments, aspects, advantages, and features ofthe present invention will be set forth in the description whichfollows, and in part will become apparent to those skilled in the art byreference to the following description of the invention and referenceddrawings or by practice of the invention. The aspects, advantages, andfeatures of the invention are realized and attained by means of theinstrumentalities, procedures, and combinations particularly pointed outin the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

[0010]FIG. 1A is an end view in accordance with the teachings of thepresent invention of a die to be mounted to a substrate;

[0011]FIG. 1B is an end view in accordance with the teachings of thepresent invention of a die having solder ball pads in a processing stepsubsequent to FIG. 1A;

[0012]FIG. 1C is an end view in accordance with the teachings of thepresent invention of a die having electrically disconnected solder ballsin a processing step subsequent to FIG. 1B;

[0013]FIG. 1D is an end view in accordance with the teachings of thepresent invention of a substrate to be mounted to a die;

[0014]FIG. 1E is an end view in accordance with the teachings of thepresent invention of a die having electrically disconnected solder ballsmounted to a substrate in a processing step subsequent to FIG. 1D;

[0015]FIG. 1F is an end view in accordance with the teachings of thepresent invention of a die having electrically disconnected solder ballselectrically wire bonded to a substrate in a processing step subsequentto FIG. 1E;

[0016]FIG. 1G is an end view in accordance with the teachings of thepresent invention of a die having electrically disconnected solder ballsmounted to a substrate and an underfill coating in a processing stepsubsequent to FIG. 1F;

[0017]FIG. 1H is an end view in accordance with the teachings of thepresent invention of an overmolding compound disposed in a processingstep subsequent to FIG. 1G;

[0018]FIG. 2A is a top view in accordance with the teachings of thepresent invention of a die having columnar and row solder ball pads;

[0019]FIG. 2B is a top view in accordance with the teachings of thepresent invention of a die having alternatively arranged columnar androw solder ball pads;

[0020]FIG. 3A is a top view in accordance with the teachings of thepresent invention of a die having corner arranged solder ball pads;

[0021]FIG. 3B is a top view in accordance with the teachings of thepresent invention of a die having pluralities of corner arranged solderball pads;

[0022]FIG. 4A is a top view in accordance with the teachings of thepresent invention of a die having perimeter arranged solder ball pads;

[0023]FIG. 4B is a top view in accordance with the teachings of thepresent invention of a die having alternatively arranged perimetersolder ball pads;

[0024]FIG. 5 is a top view in accordance with the teachings of thepresent invention of a die having diagonally arranged solder ball pads;

[0025]FIG. 6 is a top view in accordance with the teachings of thepresent invention of a die having crossly arranged solder ball pads;

[0026]FIG. 7 is a diagrammatic view of a circuit module in accordancewith the teachings of the present invention;

[0027]FIG. 8 is diagrammatic view of a memory module in accordance withthe teachings of the present invention;

[0028]FIG. 9 is a diagrammatic view of an electronic system inaccordance with the teachings of the present invention;

[0029]FIG. 10 is a diagrammatic view of an embodiment of an electronicsystem in accordance with the teachings of the present invention;

[0030]FIG. 11 is a diagrammatic view of a computer system in accordancewith the teachings of the present invention; and

[0031]FIG. 12 is a perspective view of a plurality of dies to beconnected to a printed circuit board in an alternative embodiment of thepresent invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0032] In the following detailed description of the preferredembodiments, reference is made to the accompanying drawings which form apart hereof, and in which is shown by way of illustration, specificembodiments in which the inventions may be practiced. These embodimentsare described in sufficient detail to enable those skilled in the art topractice the invention, and it is to be understood that otherembodiments may be utilized and that process, electrical or mechanicalchanges may be made without departing from the scope of the presentinvention. The terms die and substrate used in this specificationincludes any base semiconductor structure such as silicon-on-sapphire(SOS) technology, silicon-on-insulator (SOI) technology, thin filmtransistor (TFT) technology, doped and undoped semiconductors, epitaxiallayers of a silicon supported by a base semiconductor structure, as wellas other semiconductor structures well known to one skilled in the art.The following detailed description is, therefore, not to be taken in alimiting sense, and the scope of the present invention is defined onlyby the appended claims and their equivalents.

[0033] The following description and figures use a reference numeralconvention where the first digit of the reference numeral corresponds tothe figure and the following two digits correspond to like elementsthroughout the specification. For example, the die having electricallydisconnected solder balls has a reference number of 102, 202, 302, etc.corresponding to the die X02 in FIGS. 1, 2, 3, etc. where X is thenumber of the figure in which the reference numeral appears.

[0034] With reference to FIG. 1A, a die 102 to be fabricated into an ICpackage with electrically disconnected solder balls is shown in endview. The die has sides 104, a bottom 106 and a circuit side 108. As isknown, a die was originally one unit of perhaps a thousand dies of awafer (not shown) separated on the wafer from other units by scribe orsaw lines and physically separated from each other by either scribing orsawing the wafer along their respective lines. Often time dies areinterchangeably referred to as chips. In some parts of the country, diesare referred to as bars. All terms of art are embraced by thisinvention. While not required to be any particular size, for referencepurposes, the die in one embodiment is in a range from about 300 toabout 150 microns thick.

[0035] In FIG. 1B, the die 102 has one or more solder ball pads 110 (twoshown) formed on the circuit side 108 of the die. In one embodiment, thesolder ball pads are formed by a series of sequential manufacturingprocesses including deposition of a thin film layer across the surfaceof the die, masking or patterning the layer in the appropriate area onthe die where the solder ball pads are to be formed, and etching thelayer so that only the solder ball pads remain.

[0036] Some deposition techniques embraced herein, include, but are notlimited to, any variety of chemical vapor depositions (CVD), physicalvapor depositions (PVD), epitaxy, evaporation, sputtering or other knownor hereinafter developed techniques. Specific CVD techniques include lowpressure (LP) ones, but could also be atmospheric pressure (AP), plasmaenhanced (PE), high density plasma (HDP) or other. Some maskingtechniques include resist or rigid metal masks that are configured as aclear-field or dark-field mask, as those terms as well understood byskilled artisans. Some particular etching techniques embraced by thisinvention include, but are not limited to, any variety of wet etchesincluding immersion or spray, or dry etches including plasma, barrel orplanar, ion milling, reactive ion etches (RIE) or deep RIE.

[0037] The solder ball pads 110 serve as the basis for wetting andadhesion of a to-be-formed solder ball 112 as shown in FIG. 1C. In oneembodiment, the solder ball pads are formed of a multi-layer stack basedon a two-metal composition of Cr/Cu that is optimized for sustainedadhesion to avoid de-lamination. The copper interacts with the solderduring well known reflow techniques while the chromium (solder inert)forms a sort of three-dimensional mesh to hold the solder in place. In amore particular embodiment, the multi-layer stack includes Cr/CrCu/Cu/Auwhere the gold protects the copper against oxidation. Although noparticular dimensions of the solder ball pad are required by thisinvention, a 150 micron thick pad serves to provide an example.

[0038] Normally, a solder ball, such as in a flip-chip configuration,provides a mechanical strength and appropriate clearance distancebetween the two or more surfaces being joined and the electricalinterconnection between such surfaces. However, in the presentinvention, it should be appreciated the solder balls are uniquelyelectrically disconnected from any circuit formed on the die. The reasonis because the solder ball pads are formed on the die on the circuitside of the die in an area where the circuit has no electricalinput/output (I/O) interconnection. In this manner, the solder ballsremain electrically isolated from the circuit. As will become moreapparent from the following description, this will allow the die to betemporarily held in position by the solder balls until such time as itis electrically connected and more permanently affixed. As such, becauseof the temporary nature of the solder balls and their electricaldisconnection from the die circuit, they can be considered as “dummy” or“simulated” solder balls.

[0039] In one embodiment, the solder balls are comprised of a Pb/Snmetal composition and are deposited in accordance with known evaporationtechniques. Ninety-five/five percent solder balls, or 95Pb/5Sn, are oneparticular embodiment of the invention. Eutectic solder is anotherembodiment. Like the solder ball pads, no particular dimension of thesolder ball is required. As a representative example, however, thesolder balls can be about 150 microns in diameter. As such, the ratio ofsolder ball pad to solder ball is on the order of about 1:1. In otherembodiments, the ratio is 2:1 or 1:2 or other.

[0040] In FIG. 1D, a substrate 114 to be joined with the die isprovided. It contains one or more substrate pads 116 (two shown) and hassides 118, an undersurface 120 and a top 122. One or more slots, shownas 1224 in the perspective view of FIG. 12, are disposed in thethickness of the substrate between the top and the undersurface forproviding well known mounting access between the circuit of the die andthe conductive traces of the substrate. For reference purposes, thesubstrate in one embodiment is slightly thicker than the die and isabout 200 microns thick. In another embodiment of the invention, thesubstrate is a printed circuit board (PCB) and will be referredinterchangeably with the substrate hereinafter. The substrate pads arenot required to be of any particular dimension or chemical composition,but for reference purposes they will likely be similar in size andcomposition to the solder ball pads.

[0041] In FIG. 1E, the PCB 114 is brought into proximity with the die102 and the solder balls 112 are aligned and connected with thesubstrate pads 116 of the substrate. Alignment of the die and substratecan be accomplished with the assistance of well known machines such aspick-and-place machines. Connection between the solder balls and thesubstrate pads includes, but is not limited to, well know solder reflowtechniques. It should be appreciated that once connected, the die andthe substrate are at least temporarily connected to one another for thepurposes of electrically connecting the circuit of the die to thesubstrate as shown in FIG. 1F. In particular, a plurality of wires 126extending from the circuit of the die are wire bonded to the printedcircuit board to necessarily complete the electrical interconnectionthere between. In the embodiment of FIG. 12, as will be described ingreater detail below, the wires (not shown) are connected up through aslot 1224 in the printed circuit board 1214 from the circuit of the die1202 to any of the conductive traces 1227 (greatly exaggerated) disposedon the top 1227 of the printed circuit board.

[0042] The wires 126 in one embodiment are gold wire strands with abouta 1 mil. diameter. Typically, gold is the best known conductor at roomtemperature and performs excellently as a heat conductor while resistingoxidation and corrosion. Alternatively, the wires could be aluminum orpalladium because of their relative cheap cost in comparison to gold orother suitable conductor or other suitable diameter range.

[0043] In FIG. 1G, an additional, more permanent fixing of the die tothe substrate is accomplished by first disposing an underfill material128 between the die 102 and the substrate 114 and then curing theunderfill material. In the embodiment shown, the underfill materialstretches from the undersurface 120 of the substrate 114 to the circuitside 108 of the die 102. The underfill material is lengthwise, in thesame direction as the length, L, of the die, longer in a region 130 nearthe undersurface 120 of the substrate 114 than near the circuit side 108of the die. It is disposed substantially about a periphery of all solderballs 112. In one embodiment, the coefficient of thermal expansion (CTE)of the underfill material is substantially equal to the CTE of thesolder balls 112 to prevent thermal mismatch between the two structuresduring manufacturing, thermal testing and ultimate consumer usage. Twoparticular underfill materials found to be suitable for use with thisinvention are sold by Nagase under the description T693-R3002-EXV3 andT693-R3001-EXV3. They are sold in liquid form and both have a syrup-likeviscosity at room temperature. They are thermoset materials and havebeen known to adequately thermally cure in environments of about 150° C.for about 15 to 30 minutes. Once cured, it should be appreciated thatthe die and substrate are now substantially permanently affixed orconnected to one another and the prior art problems of tapede-lamination are avoided. Other suitable underfill materials include,but are not limited to, ultraviolet curable materials,microwave-oven-type curable materials or other materials now known orlater invented. The particular volume of the underfill material is afunction of package application and typically depends upon die size,solder ball size, volume of solder balls, thickness of substrate andsolder ball pads, etc. It will be appreciated that the use of theforegoing described underfill material will essentially eliminate thelarge use of silica filler which so detrimentally impinged the PCB andthe die during manufacturing and caused electrical and/or mechanicalcompromise in prior art packages. Silica filler in these embodiments ismore on the order of about 30 percent by weight.

[0044] One particular method for dispensing the underfill material isshown in FIG. 12. In particular, a needle 1232 connected to anappropriate source of underfill material dispenses the underfillmaterial through a slot 1224 (down as arrow A shows) in the printedcircuit board 1214 onto the circuit side 1208 of the die 1202 at a timewhen the dies are proximately arranged with the printed circuit board.Since this invention may be extended beyond the use of a single die to asingle substrate to a plurality of dies 1202 being connected to thesubstrate, it will be appreciated that the underfill material will inone embodiment be dispensed such that all the solder balls 1212 of thedies 1202 are substantially surrounded by the underfill material andwill extend from the tops 1208 of all dies 1202 to the undersurface 1220of the substrate 1214. The underfill material will likely also be foundbetween adjacent dies along adjacent sides 1204.

[0045] To complete the integrated circuit package (FIG. 1H), anovermolding compound 140 is disposed into all crevices and substantiallyabout all exposed sides 104 and the bottom 106 of the die 102 and aboutthe exposed periphery 142 of the underfill material 128 and along theundersurface 120 of the substrate. The overmolding compound is alsodisposed about the plurality of wires 126 along the top 122 of thesubstrate 114 used in wire bonding the circuit of the die to thesubstrate 114. This process will typically take place in a moldingcavity which gives the package its ultimate shape. It is performed underrelatively high pressure and temperatures. In one embodiment, theenvironment is about 1000 p.s.i. and about 180° C. Thereafter, thepackage is cooled. Exemplary overmolding compounds include, but are notlimited to, any epoxy or epoxy based materials. It is well known thatepoxies provide relatively low weight, low material cost, manufacturingefficiency and good moisture impermeability.

[0046] It will be appreciated that various physical arrangements of thesolder ball pads on the die, and ultimately the arrangement of thesolder balls themselves, can assume many varieties. For example, inFIGS. 2A and 2B, the solder ball pads 210 are arranged on the circuitside 208 of the die 202 in a rectangular grid-like array as a pluralityof columns (Cx) and rows (Rx), where x ranges upward from one until anumber, dependent upon size of the solder ball pad and the size of thedie, is reached where the die is filled. As a practical constraint,however, one embodiment of the present invention limits the number ofsolder ball pads on the die in a range from about 10 to about 30.

[0047] In FIGS. 3A and 3B, the solder ball pads 310 are arranged on thecircuit side 308 of the die 302 in corner regions 350 thereof. In FIG.3A, single solder ball pads are shown in the corner region while in FIG.3B, pluralities of solder ball pads 310 are shown. In corner regions350A and 350B, the plurality of solder ball pads are shown in adiamond-like arrangement as shown by the dashed lines. In corner regions350C and 350D, the pluralities are shown in a square box-likearrangement. It should be appreciated that although described ascorner-arranged solder ball pads, the pads themselves can still form oneor more rows or columns of pads.

[0048] In FIGS. 4A and 4B, the solder ball pads 410 are arranged on thecircuit side 408 of the die 402 about a perimeter or periphery of thedie. In FIG. 4A, the solder ball pads are arranged as a rectangularbox-like configuration about the periphery of the die whereas in FIG.4B, they are arranged in a oval-like configuration. It should beappreciated that although described as periphery-arranged solder ballpads, the pads themselves can still form one or more rows or columns ofpads or occupy a corner region with one or more pads.

[0049] In FIG. 5, the solder ball pads 510 are arranged on the circuitside 508 of the die 502 in a diagonal manner beginning in the cornerregions 550 and extending linearly towards a center region 555. Itshould be appreciated that although described as diagonally-arrangedsolder ball pads, the pads themselves can still form one or more rows orcolumns of pads, occupy a corner region or periphery with one or morepads.

[0050] In FIG. 6, the solder ball pads 610 are arranged on the circuitside 608 of the die 602 in a crossly manner as indicated by the dashedlines that would cross one another somewhere in the vicinity of centerregion 655. It should be appreciated that although described ascrossly-arranged solder ball pads, the pads themselves can still formone or more rows or columns of pads, occupy a corner region or peripherywith one or more pads.

[0051] It will be further appreciated that all the foregoing describedembodiments can be mixed and matched with one another to achieve evenstill further solder ball pad embodiments than those shown. With theassistance of this invention, those skilled in the art can envisionstill other arrangements without departing from the scope of theinvention. For example, in all embodiments, it is also possible toarrange the pads in such a manner as to slightly offset themselves fromone another thereby departing from the generally linear arrangements toachieve generally stair-step profiles or to closely arrange two or threeor more substantially parallel sets of solder ball pads.

[0052] In all previous embodiments shown, it should be apparent that thesolder ball pads were arranged to generally avoid the center region ofthe particular die upon which it was placed. This is because as the dieand the substrate are brought into proximity with one another to connectthe solder balls to the substrate pads, the slots of the substrategenerally exist above the center region of the dies. See FIG. 12 tounderstand this conceptually (slot 1224 is avoided by solder balls 1212in corner regions of the dies 1202). As such, the solder ball pads areshown in a manner that avoids the slot of the substrate or, in otherwords, are disposed on the die not adjacent to the slot. It will beappreciated, however, that in the event the substrates have slotsarranged in areas to receive the die other than the center region, thedie will have solder ball pads placed accordingly in other ways. Evenfurther, in the event the substrates to which the dies are connectedcontain absolutely no slots the solder ball pad arrangement, andultimately the solder ball arrangement, my exist anywhere on the surfaceof the die so long as the solder balls are electrically disconnectedfrom the circuit.

[0053] So far, this invention has been described where the circuit sideof the die is connected in a manner to face the substrate. As is knownin the art, this is called a board-on-chip (BOC) package. It should beappreciated, however, that this invention is equally applicable to dieshaving their circuit sides disposed away or not facing the substrate. Inthis embodiment, the invention is considered as a chip-on-board (COB)package.

[0054] Still further, the present invention may be practiced with otherwell known packaging techniques. For example, it is possible to combinethis technique with flip-chip packages. In such an embodiment, theinventive package would not only include electrically disconnected dummysolder balls for mounting purposes but would include solder balls orsolder bumps electrically connected to the circuit of the die.

[0055] Aside from the other advantages already mentioned, in someinstances it is believed the preceding described package(s) will allowpassage of the more stringent JEDEC standard tests, thereby achievinghigher level markings than two-sided tape arrangements of the prior art,and will enhance package marketability.

[0056] In the remaining figures, and without strict adherence to theprevious numbering convention, dies will be described as they are usedin variety of applications. Some of these dies, it will be appreciated,are packaged in accordance with the foregoing described inventionrelating to electrically disconnected solder balls used for mountingpurposes. The dies also contain other integrated circuit elements suchas capacitors, transistors, lines, interconnects, plugs, pads, I/Oconnections, insulators and other known elements as part of the diecircuit previously mentioned.

[0057] As shown in FIG. 7, which is similar to FIG. 12, two or more dies701 having electrically disconnected solder balls in accordance with thepresent invention can be combined, with or without protective casing,into a circuit module 700 to enhance or extend the functionality of anindividual die 701. Circuit module 700 may be a combination of dies 701representing a variety of functions, or a combination of dies 701containing the same functionality. In one embodiment, circuit module 700includes at least one socket, slot, recess or the like 752 into whichthe die 701 is received. Slot 752 in one embodiment is a circuit board750. Slot 752, in another embodiment, represents a mount including landpatterns. In any embodiment, dies 701 may be received by slot 752 in apick-and-place operation by suitable pick-and-place machines.

[0058] Some examples of a circuit module 700 includes memory modules,device drivers, power modules, communication modems, processor modulesand application-specific modules, and may include multilayer, multichipmodules. Such modules will have a chip receiver in which a chipaccording to the present invention is inserted. Circuit module 700 maybe a subcomponent of a variety of electronic systems, such as a clock, atelevision, a cell phone, a personal computer, an automobile, anindustrial control system, an aircraft and others. Such modules willhave a circuit module receiver in which a circuit module according tothe present invention is inserted. Circuit module 700 will have avariety of leads 705 _(l) through 705 _(N) extending therefrom providingunilateral or bilateral communication and control in its particularapplication.

[0059]FIG. 8 shows one embodiment of a circuit module as memory module800. Memory module 800 contains multiple memory devices 801 contained onsupport 861. In one embodiment, support 861 includes slots 852 forreceiving memory devices 801. The number of memory devices generallydepends upon the desired bus width and the desire for parity. Memorydevices 801 include at least die having electrically disconnected solderballs packaged in accordance with the present invention. The support 861includes sockets, slots, recesses or the like 852, each adapted toreceive a memory device 801 and provide electrical communication betweena bus and memory device 801. Memory module 800 accepts a command signalfrom an external controller (not shown) on a command link 863 andprovides for data input and data output on data links 865. The commandlink 863 and data links 865 are connected to leads 867 extending fromthe support 815. Leads 867 are shown for conceptual purposes and are notlimited to the position shown in FIG. 8.

[0060]FIG. 9 shows one embodiment of an electronic system 900 containingone or more circuit modules 700. At least one of the circuit modules 700contains a die having electrically disconnected solder balls packaged inaccordance with the present invention. Electronic system 900 generallycontains a user interface 969. User interface 969 provides a user of theelectronic system 900 with some form of control or observation of theresults of the electronic system 900. Some examples of user interface969 include the keyboard, pointing device, monitor or printer of apersonal computer; the tuning dial, display or speakers of a radio; theignition switch, gauges or gas pedal of an automobile; and the cardreader, keypad, display or currency dispenser of an automated tellermachine. User interface 969 may further describe access ports providedto electronic system 900. Access ports are used to connect an electronicsystem to the more tangible user interface components previouslyexemplified. One or more of the circuit modules 700 may be a processorproviding some form of manipulation, control or direction of inputs fromor outputs to user interface 969, or of other information eitherpreprogrammed into, or otherwise provided to, electronic system 900. Inanother embodiment, electronic system 900 includes memory modules 800.As will be apparent from the lists of examples previously given,electronic system 900 will often be associated with certain mechanicalcomponents (not shown) in addition to circuit modules 700 and userinterface 969. It will be appreciated that the one or more circuitmodules 700 in electronic system 900 can be replaced by a singleintegrated circuit. Furthermore, electronic system 900 may be asubcomponent of a larger electronic system.

[0061]FIG. 10 shows one embodiment of an electronic system as memorysystem 1000. Memory system 1000 contains one or more memory modules 800and a memory controller 1070. At least one of the memory modules 800includes a die having electrically disconnected solder balls packaged inaccordance with the present invention. Memory controller 1070 providesand controls a bidirectional interface between memory system 1000 and anexternal system bus 1072. Memory system 1000 accepts a command signalfrom the external bus 1072 and relays it to the one or more memorymodules 800 on a command link 1074. Memory system 1000 provides for datainput and data output between the one or more memory modules 800 andexternal system bus 1072 on data links 1076.

[0062]FIG. 11 shows a further embodiment of an electronic system as acomputer system 1100. Computer system 1100 contains a processor 1101 anda memory system 1000 housed in a computer unit 1080. In one embodiment,the memory system 1000 includes a die packaged in accordance with thepresent invention. In another embodiment, processor 1101 includes a diepackaged in accordance with the present invention. Computer system 1100is but one example of an electronic system containing another electronicsystem, i.e., memory system 1000, as a subcomponent. Computer system1100 optionally contains user interface components. Depicted in FIG. 11are a keyboard 1181, a pointing device 1183 such as a mouse, trackball,or joystick, a monitor 1185, a printer 1187 and a bulk storage device1189. It will be appreciated that other components are often associatedwith computer system 1100 such as modems, device drivers, additionalstorage devices, etc. These other components, in still anotherembodiment, include at least one die package having dummy solder ballsof the present invention. It will be appreciated that the processor 1101and memory system 1000 of computer system 1100 can be incorporated on asingle integrated circuit. Such single package processing units reducethe communication time between the processor and the memory circuit.

Conclusion

[0063] The above structures and methods have been described, by way ofexample, and not by way of limitation, with respect to a semiconductorIC package having electrically disconnected solder balls useful duringthe mounting a die to a printed circuit board.

[0064] In particular, packages are taught that connect a plurality ofsolder balls between a plurality of solder ball pads of a die andsubstrate pads of a printed circuit board. The solder balls areelectrically disconnected from any circuit of the die and are used totemporarily hold the die in position with respect to the printed circuitboard until the circuit is wire bonded and an underfill material iscured between the die and the printed circuit board to more permanentlyconnect them together. The underfill material is selected to have acoefficient of thermal expansion (CTE) that is substantially equal tothe CTE of the solder balls. In this manner, the thermal mismatch of theprior art is avoided. The de-lamination problems associated withtwo-sided tapes are also avoided since the underfill material isselected to be better suited in joining a die with a printed circuitboard. The package is completed by disposing an overmolding compoundabout the die and the underfill material and about the wire bonds toprotect the package from moisture, thermal swings, etc., in hostileenvironments.

[0065] The present invention has been particularly shown and describedwith respect to certain preferred embodiment(s). However, it will bereadily apparent to those skilled in the art that a wide variety ofalternate embodiments, adaptations or variations of the preferredembodiment(s), and/or equivalent embodiments may be made withoutdeparting from the intended scope of the present invention as set forthin the appended claims. Accordingly, the present invention is notlimited except as by the appended claims.

What is claimed is:
 1. An apparatus, comprising: a die having a circuit;a solder ball pad; and a solder ball on the solder ball pad, the solderball being electrically disconnected from the circuit.
 2. The apparatusof claim 1, further including a substrate having a substrate pad, thesolder ball being connected to the substrate pad.
 3. The apparatus ofclaim 2, further including an underfill material between and connectingthe die to the substrate.
 4. The apparatus of claim 1, further includinga plurality of solder balls and solder ball pads, the plurality ofsolder balls pads being arranged about a periphery of a circuit side ofthe die, each of the plurality of solder ball pads having one of theplurality of solder balls connected thereto.
 5. An apparatus,comprising: a plurality of solder balls; a printed circuit board havinga plurality of substrate pads; and a die having a circuit and aplurality of solder ball pads, each of the plurality of solder ballsbeing connected to one of the plurality of substrate pads and one of theplurality of solder ball pads, one or more of the plurality of solderballs being electrically disconnected from the circuit.
 6. The apparatusof claim 5, wherein the plurality of solder ball pads are arranged on acircuit side of the die.
 7. The apparatus of claim 5, wherein theplurality of solder ball pads are arranged on a periphery of the die. 8.The apparatus of claim 5, wherein the plurality of solder ball pads arearranged on the die as a plurality of columns and rows.
 9. The apparatusof claim 5, wherein the plurality of solder ball pads are arranged onthe die in a corner thereof.
 10. The apparatus of claim 5, wherein theplurality of solder ball pads are diagonally arranged on the die. 11.The apparatus of claim 5, wherein the plurality of solder ball pads areformed of a Cu/Cr metal composition.
 12. The apparatus of claim 5,wherein the plurality of solder balls are formed of a Pb/Sn metalcomposition.
 13. An integrated circuit package, comprising: a pluralityof solder balls; a printed circuit board having a plurality of substratepads; a die having a circuit and a plurality of solder ball pads on acircuit side thereof, each of the plurality of solder balls beingconnected to one of the plurality of substrate pads and one of theplurality of solder ball pads, one or more of the plurality of solderballs being electrically disconnected from the circuit; and an underfillmaterial between and connecting the die to the printed circuit board.14. The package of claim 13, wherein the underfill material is one of athermoset and ultraviolet curable material.
 15. The package of claim 13,wherein the underfill material substantially surrounds each of theplurality of solder balls.
 16. The package of claim 13, wherein theunderfill material extends in a lengthwise direction near anundersurface of the printed circuit board beyond a side of the die. 17.The package of claim 13, wherein the underfill material is selected witha coefficient of thermal expansion to be about substantially equal to acoefficient of thermal expansion of the plurality of solder balls.
 18. Aboard-on-chip semiconductor integrated circuit package, comprising: aplurality of solder balls; a printed circuit board having a slot and aplurality of substrate pads, a die having a circuit wire bonded to theprinted circuit board and a plurality of solder balls pads arrangedabout the die on a circuit side thereof such that when the die and theprinted circuit board are brought into proximity with one another theplurality of solder ball pads are not disposed adjacent to the slot,each of the plurality of solder balls being connected between one of theplurality of substrate pads and one of the plurality of solder ballpads, each of the plurality of solder balls being electricallydisconnected from the circuit; and an underfill material between andconnecting the die and the printed circuit board.
 19. The package ofclaim 18, further including an overmolding compound disposedsubstantially about the die and the underfill material.
 20. Aboard-on-chip semiconductor integrated circuit package, comprising: aplurality of solder balls; a printed circuit board having a plurality ofslots and a plurality of substrate pads; a plurality of dies each havinga circuit wire bonded to the printed circuit board via one of the slotsand a plurality of solder balls pads arranged about the die on a circuitside thereof such that when the die and the printed circuit board arebrought into proximity with one another the plurality of solder ballpads are not disposed adjacent to the slot, each of the plurality ofsolder balls being connected between one of the plurality of substratepads and one of the plurality of solder ball pads, each of the pluralityof solder balls being electrically disconnected from the circuit; and anunderfill material between and connecting each of the plurality of diesand the printed circuit board.
 21. The package of claim 20, furtherincluding an overmolding compound disposed substantially about each ofthe plurality of dies and the underfill material.
 22. A method,comprising: providing a die having a circuit; forming a solder ball padon the die; and forming a solder ball on the solder ball pad, the solderball being formed in an electrically disconnected manner from thecircuit.
 23. The method of claim 22, further including providing asubstrate and forming a substrate pad thereon.
 24. The method of claim23, further including connecting the solder ball to the substrate pad.25. The method of claim 22, further including providing a substrate anddisposing an underfill material between the die and the substrate. 26.The method of claim 25, further including curing the underfill material.27. The method of claim 25, further including providing a substrate andwire bonding the circuit thereto.
 28. A method, comprising: providing adie having a circuit; depositing a solder ball pad on a circuit side ofthe die; evaporating a solder ball on the solder ball pad, the solderball being formed in an electrically disconnected manner from thecircuit; providing a printed circuit board with a substrate pad thereon;connecting the solder ball the substrate pad; and disposing an underfillmaterial between the die and the printed circuit board.
 29. The methodof claim 28, further including curing the underfill material.
 30. Themethod of claim 29, further including wire bonding the circuit toconductor traces of the printed circuit board.
 31. The method of claim28, wherein the depositing the solder ball pad further includesdepositing a plurality of solder ball pads as one of diagonally,crossly, and in columns and rows on a surface of the die.
 32. The methodof claim 28, wherein the depositing the solder ball further includesdepositing a Cu/Cr metal composition.
 33. The method of claim 28,further including disposing an overmolding compound substantially aboutthe die and the underfill material.
 34. A method of forming anintegrated circuit package, comprising: providing a die having acircuit; forming a plurality of solder ball pads on a circuit side ofthe die; forming a plurality of solder balls, each of the plurality ofsolder balls being formed on one of the plurality of solder ball padsand being formed in an electrically disconnected manner from the circuitat a position on the die having no electrical connection; providing aprinted circuit board with a plurality of substrate pads thereon;connecting each of the plurality of solder balls to one of the pluralityof the substrate pads; wire bonding the circuit to the printed circuitboard; disposing an underfill material between the die and the printedcircuit board and substantially about the plurality of solder balls; andcuring the underfill material.
 35. The method of claim 34, wherein thedisposing the underfill material further includes dispensing theunderfill material from a needle through a slot in the printed circuitboard.
 36. The method of claim 34, wherein the disposing the underfillmaterial further includes selecting the underfill material to have acoefficient of thermal expansion substantially equal to a coefficient ofthermal expansion of the plurality of solder balls.
 37. The method ofclaim 34, wherein the curing the underfill material further includes oneof thermosetting and ultraviolet curing.
 38. The method of claim 34,further including disposing an overmolding compound substantially aboutthe die and the underfill material.
 39. A method of forming aboard-on-chip semiconductor integrated circuit package, comprising:providing a die having a circuit; forming a plurality of solder ballpads on a circuit side of the die about a periphery thereof, forming aplurality of solder balls, each of the plurality of solder balls beingformed on one of the plurality of solder ball pads and being formed inan electrically disconnected manner from the circuit, the plurality ofsolder balls having a substantially equal first coefficient of thermalexpansion; providing a printed circuit board having a slot and aplurality of substrate pads thereon; bringing the printed circuit boardand die into proximity with one another, the plurality of solder ballpads not being adjacent to the slot; connecting each of the plurality ofsolder balls to one of the plurality of the substrate pads; wire bondingthe circuit to the printed circuit board; disposing an underfillmaterial between the die and the printed circuit board and substantiallyabout the plurality of solder balls, the underfill material having asecond coefficient of thermal expansion substantially equal to the firstcoefficient of thermal expansion; curing the underfill material so thatthe die and the printed circuit board become connected; and disposing anovermolding compound substantially about the die and the underfillmaterial.
 40. The method of claim 39, further including disposinganother overmolding compound substantially about a plurality of wiresused in the wire bonding of the circuit to the printed circuit board.41. The method of claim 40, wherein the forming a plurality of solderball pads further includes depositing the plurality of solder ball padsas one of diagonally, crossly, and in columns and rows on a surface ofthe die.
 42. The method of claim 41, wherein the curing the underfillmaterial further includes one of thermosetting and ultraviolet curing.43. A method of forming a board-on-chip semiconductor integrated circuitpackage, comprising: providing a plurality of dies, each having acircuit; forming a plurality of solder ball pads on a circuit side ofeach of the plurality of dies about a periphery thereof; forming aplurality of solder balls, each of the plurality of solder balls beingformed on one of the plurality of solder ball pads and being formed inan electrically disconnected manner from each of the circuits; providinga printed circuit board having a plurality of slots and a plurality ofsubstrate pads thereon; bringing the printed circuit board and each ofthe plurality of dies into proximity with one another, the plurality ofsolder ball pads not being adjacent any of the plurality of slots;connecting each of the plurality of solder balls to one of the pluralityof the substrate pads; wire bonding each of the circuits to the printedcircuit board; and disposing an underfill material between the pluralityof dies and the printed circuit board and substantially about theplurality of solder balls.
 44. The method of claim 43, further includingcuring the underfill material so that the plurality of dies and theprinted circuit board become substantially permanently connected. 45.The method of claim 43, further including disposing an overmoldingcompound substantially about the die and the underfill material.
 46. Themethod of claim 43, further including disposing an overmolding compoundsubstantially about a plurality of wires used in the wire bonding of theeach of the circuits to the printed circuit board.
 47. An electronicsystem, comprising: a processor; and a memory system coupled to theprocessor, wherein the memory system is contained in a package having: aplurality of solder balls; a printed circuit board having a plurality ofsubstrate pads; a die having a memory circuit and a plurality of solderball pads on a circuit side thereof, each of the plurality of solderballs being connected to one of the plurality of substrate pads and oneof the plurality of solder ball pads, one or more of the plurality ofsolder balls being electrically disconnected from the circuit; and anunderfill material between and connecting the die to the printed circuitboard.
 48. The system of claim 47, wherein the package further includesan overmolding compound disposed substantially about the die and theunderfill material.
 49. The system of claim 47, further including one ofa monitor, a bulk storage device, a keyboard, a pointing device and aprinter.
 50. An electronic system, comprising: a processor; and a memorysystem coupled to the processor, wherein the memory system is containedin a package having: a plurality of solder balls; a printed circuitboard having a plurality of substrate pads; and a plurality of dies eachhaving a memory circuit and a plurality of solder ball pads on a circuitside thereof, each of the plurality of solder balls being connected toone of the plurality of substrate pads and one of the plurality ofsolder ball pads, one or more of the plurality of solder balls beingelectrically disconnected from the circuit.
 51. The system of claim 50,wherein the package further includes an underfill material between andconnecting each of the plurality of dies to the printed circuit board.52. The system of claim 51, wherein the package further includes anovermolding compound disposed substantially about each of the pluralityof dies and the underfill material.
 53. The system of claim 50, whereinone of the memory circuits further includes at least one memory moduleand a memory controller.